1. Field of the Invention
This invention relates to a time-division multiplex transmission system which includes a host machine, a plurality of addressable terminals and a signal line connecting the terminals to the host machine to place objects to be controlled, (connected to the terminal) under the centralized control of the host machine and objects to be monitored, (connected to the terminals) under the centralized monitoring of the host machine.
2. Description of the Related Art
FIG. 1 shows the scheme of a conventional time-division multiplex transmission system. A host machine 3 and plurality of addressable terminals 51 to 55 are connected together by way of a signal line 6. The host machine 3 and the terminals 51 to 55 are further connected by means of a commercial power line 2 leading from a distribution board 1. Connected to the respective terminals are objects to be controlled, (for example, loads 4) or objects to be monitored (for example, a sensor 7 and a wall switch 8). The host machine 3 and the loads 4 are enabled with the utility power from the commercial power line 2 as their enabling power. Enabling power is also made available to each of the terminals 51 to 55 by full-wave rectifying a transmission signal SS sent in the fashion of time-division multiplex transmission via the signal line 6 (which is of the two-wire type) from the host machine 3. The terminals 51 to 55 receive the transmission signal SS and control the loads 4. The sensor 7 may be a daylight sensor, a temperature sensor or a fire/burglary sensor. Monitor data from the sensor 7 are fed back to the host machine 3 as a reply signal RS via the terminal 53. The wall switch 8 comprises operation switches 8a and 8b. Electric representation of the operational states of the operation switches 8a and 8b is fed to the host machine 3 via the terminal 55.
FIG. 2 illustrates the transmission signal fed from the host machine 3 to the terminals. The transmission signal SS for each of the terminals consists of a serial sequence of a start pulse SP of a slightly broader width, a 1-bit pulse of a logic value "1", M-bit address data AD for selection of a desired one of the terminals, a 1-bit address data parity bit AP, a 1-bit pulse of a logic value "1", N-bit control data CD for controlling the object to be controlled in the selected one of the terminals, a 1-bit control data parity bit CP and a reply standby signal WP for receiving the reply signal from the terminal. It is noted that pulses of a broader width in the address data AD and control data CD denote a logic value "1" and those of a narrower one denote a logic value "0". A reply standby period TW during which the reply standby signal WP is under transmission, has a sufficient length. These signal components are transmitted for each address in a cyclic fashion as the transmission signal SS from the host machine 3.
The terminals 51 to 55 read the control data CD from the transmission signal SS sent via the signal line 6 from the host machine 3 and control their associated loads 4. Furthermore, the terminals 51 to 55 send the reply signal RS back to the host machine in the current mode during the reply standby period TW of the transmission signal SS. FIG. 3 illustrates the reply signal RS fed from a terminal to the host machine 3. The reply signal RS is shown as including monitor data I1 to I5 from the objects to be monitored, such as the sensor and the like, and a parity bit P. As with the transmission signal SS, current pulses of a broader width in the reply signal RS denote the logic value "1" and those of a narrower one denote the logic value "0". Upon receipt of the reply signal R from any of the terminals 51 to 55, the host machine 3 keeps watch on the status of the objects to be monitored, such as the sensor and the like.
Assuming that the address data AD in the transmission signal SS is 8 bits long, the conventional time-division multiplex transmission system as discussed above has not more than 256 addresses available. This presents the problem that a total number of the terminals connectable to the single host machine 3 should not exceed 256. While under these circumstances an increase in the bit length of the address data AD may increase the total number of the terminals 5 connectable thereto, it presents another problem in that it takes a longer time for the host machine 3 to gain access to all of the terminals 5. Another possible approach is to divide the plurality of the terminals 5 into a plurality of groups and assign the same address to the terminals in the same group. This approach itself is however disadvantageous in that the host machine 3 cannot perform a reliable monitoring function because of timewise overlap of the reply signals from the different terminals. There is, therefore, still the demand for a time-division multiplex transmission system in which the reply signals from a plurality of terminals having the same address assigned thereto do not overlap in time with one another.